INTERNATIONAL BURCH UNIVERSITY
Faculty of Engineering and Natural Sciences
Department of Information Technologies
2014-2015

SYLLABUS
Code Name Level Year Semester
CEN 283 Digital Design Undergraduate 2 Fall
Status Number of ECTS Credits Class Hours Per Week Total Hours Per Semester Language
Compulsory 6 3 + 2 96 English

Instructor Assistant Coordinator
Nejdet Dogru, Assist. Prof. Dr. Harun Šiljak Nejdet Dogru, Assist. Prof. Dr.
[email protected] [email protected] no email

COURSE OBJECTIVE
The course is designed to introduce the basics of digital design, digital logic and automata theory to students together with a solid introduction to hardware design in HDL, namely Verilog.

COURSE CONTENT
Week
Topic
  1. Introduction
  2. Introduction to logic circuits: Boolean algebra
  3. Introduction to logic circuits: CAD, Verilog
  4. Introduction to logic circuits: Minimization
  5. Arithmetic circuits: number representation
  6. Arithmetic circuits: CAD
  7. Combinational blocks: multiplexers, decoders
  8. Combinational blocks: Verilog
  9. Mid-term Examination
  10. Flip-flops, registers and counters: theory
  11. Flip-flops, registers and counters: Verilog
  12. Sequential circuits: basics of FSM
  13. Sequential circuits: Verilog
  14. Sequential circuits: minimization
  15. Sequential circuits: ASM

LABORATORY/PRACTICE PLAN
Week
Topic
  1. Quartus Introduction
  2. Getting started with ModelSim
  3. Switches, lights and multiplexers - lab
  4. Numbers and displays - preparation
  5. Numbers and displays - lab
  6. Adders, subtractors and multipliers - preparation
  7. Adders, subtractors and multipliers - lab
  8. Pre-midterm problem solving
  9. Latches, Flip-flops and Registers - preparation
  10. Latches, Flip-flops and Registers - lab

  1. Counters - preparation
  2. Counters - lab
  3. Finite State Machines - preparation
  4. Finite State Machines - lab

TEACHING/ASSESSMENT
Description
  • Lectures
  • Practical Sessions
  • Excersises
  • Assignments
  • Demonstration
Description (%)
Method Quantity Percentage (%)
Midterm Exam(s)130
Laboratory630
Final Exam140
Total: 100
Learning outcomes
  • Evaluate basic theories, processes and outcomes of computing;
  • Apply theory, techniques and relevant tools to the specification, analysis, design, implementation and testing of a simple computing product;
  • Knowledge and critical understanding of the well-established principles of computing, and of the way in which those principles have developed as technology has progressed
  • Knowledge of all of the main development methods relevant to the field of computing, and ability to evaluate critically the appropriateness of different approaches to solving problems in the field of study
TEXTBOOK(S)
  • Brown, Vranešić: Fundamentals of Digital Logic with Verilog Design, McGraw-Hill, Third Edition 2013

ECTS (Allocated based on student) WORKLOAD
Activities Quantity Duration (Hour) Total Work Load
Lecture (14 weeks x Lecture hours per week)800.7560
Laboratory / Practice (14 weeks x Laboratory/Practice hours per week)16116
Midterm Examination (1 week)11010
Final Examination(1 week)11010
Preparation for Midterm Examination 0
Preparation for Final Examination6 0
Assignment / Homework/ Project 0
Seminar / Presentation 0
Total Workload: 96
ECTS Credit (Total workload/25): 4